That is compatible with the RISC-V systems it simulates and ( RISC-V Rocket Chip and BOOM), with an optionalĬycle-accurate network simulation tying them together. Nodes, derived directly from silicon-proven and open target-RTL To cycle-exactly simulate from one to thousands of multi-core compute Open RTL for RISC-V processors with a custom cycle-accurate network simulation.īy default, FireSim provides all the RTL and models necessary
#Fwsim firetek compatability software#
You can also integrateĬustom software models for components that you don’t want/need to write as RTL.įireSim was originally developed to simulate datacenters by combining
Depending on the hardware design and the simulation scale,įireSim simulations run at 10s to 100s of MHz. Run it at near-FPGA-prototype speeds on cloud FPGAs, while obtainingĬycle-accurate performance results (i.e. With FireSim, you can write your own RTL (processors, accelerators, etc.) and You can also scroll further down to read more FAQs.įireSim can simulate arbitrary hardware designs written inĬhisel or designs that can be transformed This recent video from the Chisel Community Conference dives in-depth into FireSim. The FireSim codebase is open-source and lives at Group in the Electrical Engineering and Computer Sciencesĭepartment at the University of California, Berkeley.įireSim, you can find our documentation and tutorials atĭ.
FPGA-accelerated full-system hardware simulation platform that runs on cloud FPGAs (Amazon EC2 F1).įireSim is actively developed in the Berkeley Architecture Research